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DV-GLS ENGINEER @ GSVR TALENT SOLUTIONS PVT LTD

0 Negotiable or Not Mentioned India 62 days ago gsvrtalent.com 1834 Views

GSVR Talent Solutions is actively seeking a highly skilled Design Verification Engineer specializing in Gate-Level Simulation (GLS). This role is centered within the rapidly evolving semiconductor industry, requiring candidates who possess a minimum of four years of relevant experience in VLSI verification. The successful applicant will be crucial in ensuring the robustness and accuracy of complex digital designs through rigorous testing and simulation processes. This opportunity is ideal for professionals passionate about advanced verification flows and detail-oriented technical execution.The core responsibilities include utilizing SystemVerilog and UVM environments to execute functional verification tasks. A major focus of this position involves Gate-Level Simulation (GLS), requiring expertise in handling SDF annotation, performing detailed timing checks, and debugging complex simulation failures. The engineer will also manage regression runs and perform comprehensive coverage analysis to meet stringent design verification goals within the VLSI domain.

Key Requirements

SystemVerilog & UVM expertise Proficiency in Gate-Level Simulation (GLS) Experience with SDF Annotation Ability to perform Timing Checks and Debugging Strong background in Functional Verification Skill in Regression and Coverage Analysis Minimum 4 years of experience in VLSI verification domain Expertise in advanced verification methodologies and flows Strong analytical and problem-solving skills related to silicon debug Deep understanding of semiconductor industry practices
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DDR VERIFICATION ENGINEER @ GSVR TALENT SOLUTIONS PVT LTD

0 Negotiable or Not Mentioned India 18 days ago gsvrtalent.com 887 Views

GSVR Talent Solutions Pvt Ltd is hiring experienced DDR Verification Engineers to join their high-performance semiconductor team. This role involves working on cutting-edge technology including next-generation AI chips and high-speed memory interfaces. The chosen candidate will be responsible for the verification of DDR3, DDR4, DDR5, and LPDDR4/LPDDR5 controllers, ensuring that every memory transaction behaves exactly as expected before silicon production. You will develop UVM-based verification environments using DDR VIPs and work closely with senior VLSI engineering teams.

In this position, you will create and debug complex memory traffic scenarios and ensure strict protocol compliance through functional coverage closure. The role requires a strong debugging and analytical mindset to solve intricate hardware validation challenges. By joining this project, you will contribute to the development of high-performance computing systems and collaborate with experts in the VLSI industry to deliver reliable hardware solutions for modern technology infrastructures.

Key Requirements

At least 4 years of professional experience in Design Verification within the VLSI or semiconductor industry. Strong technical knowledge of DDR protocols including DDR3, DDR4, and DDR5. Hands-on expertise with LPDDR4 and LPDDR5 memory architectures and controllers. Proven experience in developing and maintaining UVM-based (Universal Verification Methodology) environments. Advanced proficiency in using SystemVerilog for hardware verification tasks. Direct experience working with DDR Verification IPs (VIPs) and associated debugging tools. Ability to create, simulate, and debug complex memory traffic scenarios for validation. Demonstrated ability to ensure protocol compliance and achieve functional coverage closure. A strong debugging and analytical mindset to resolve architectural and functional issues. Ability to collaborate effectively with cross-functional engineering teams on high-performance computing projects.
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DESIGN VERIFICATION (DV) ENGINEERS @ KARASHATECH

0 Negotiable or Not Mentioned India, Hyderabad 11 days ago karashatech.com 246 Views

KarashaTech is seeking highly skilled and experienced Design Verification (DV) Engineers to join our rapidly growing technical team in Hyderabad. In this role, you will be responsible for the verification of complex integrated circuits, ensuring that designs meet functional requirements and power specifications. You will work closely with design teams to define verification strategies and develop robust testbenches that leverage advanced industry methodologies. This is an excellent opportunity for a professional looking to work on cutting-edge semiconductor projects within a collaborative and innovative environment.The successful candidate will demonstrate a deep understanding of the full verification lifecycle, from planning to coverage closure. You will be expected to handle power-aware simulations and debug intricate issues across RTL and UPF models. With a requirement for at least five years of experience, we are looking for engineers who can hit the ground running and contribute to our high-standards of silicon quality. Candidates with a short notice period are highly preferred to meet our current project timelines.

Key Requirements

Minimum of 5 years of professional experience in Design Verification. Strong hands-on experience with SystemVerilog for verification. Advanced proficiency in Universal Verification Methodology (UVM). Solid understanding of Unified Power Format (UPF) and Power Intent Modeling. Proven experience conducting Power-Aware Simulations. In-depth knowledge of Power Domains and Power States. Familiarity with Isolation, Retention, and Level Shifters within designs. Understanding of the interactions between Reset and Power states. Strong debugging skills across RTL, UPF, and various Testbench environments. Ability to join within a short notice period of approximately 15 days.
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RTL DESIGN ENGINEER @ SKALEN SEMI

0 Negotiable or Not Mentioned India 28 days ago skalensemi.com 1177 Views

Skalen Semi is seeking an experienced RTL Design Engineer to join a dynamic team working with global design services powerhouses. The role involves deep involvement in high-performance and low-power RTL development, microarchitecture definition, and SoC architecture design. You will be responsible for creating synthesis-ready RTL, managing timing closure (STA), and ensuring logical equivalence using tools such as Conformal or Formality.

This position is available in both Bangalore and Hyderabad. Candidates must have significant experience in the semiconductor industry, specifically within ASIC and chip design environments. Please note that this is a senior-level position requiring 6 to 12 years of relevant experience; applications from freshers or interns are not being accepted at this time.

Key Requirements

6 to 12 years of professional experience in RTL Design and Development. Proven expertise in Microarchitecture and SoC Architecture design. Proficiency in Hardware Description Languages (HDL) like SystemVerilog and Verilog. Experience in IP Design and Subsystem Design for high-performance systems. Solid understanding of Low Power RTL design and Clocking Architecture. Familiarity with Pipeline Design and Bus/Interconnect architectures. Demonstrated ability to deliver Synthesis-Ready RTL and achieve Timing Closure (STA). Hands-on experience with LEC tools such as Conformal or Formality. Knowledge of DFT-ready RTL design and implementation best practices. Strong background in ASIC design flows and the semiconductor industry.
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PHYSICAL DESIGN ENGINEERS (3 POSITIONS) @ SKALENSEMI

0 Negotiable or Not Mentioned India 13 days ago skalensemi.com 538 Views

SkalenSemi is seeking experienced Physical Design Engineers for three open positions to join our team in India. This role requires individuals with a strong background in the full physical design cycle, from floorplanning to sign-off. Candidates will be expected to work on-site at our facilities in either Bangalore or Pune, contributing to cutting-edge ASIC and chip design projects. The work model is strictly onsite, ensuring close collaboration with our technical teams in these key technology hubs.

The successful candidates will have between 6 to 12 years of relevant industry experience in the semiconductor field. Key responsibilities include handling complex physical design tasks such as Place and Route (PnR), Clock Tree Synthesis (CTS), and sign-off verification using industry-standard tools like Calibre. A robust understanding of VLSI design and the ability to ensure high-quality design outcomes are essential for this position. This is an excellent opportunity to grow within a dynamic technical environment focused on semiconductor innovation and high-performance chip design.

Key Requirements

6-12 years of professional experience in Physical Design. Strong hands-on experience in Physical Design flow and sign-off processes. Proficiency in Place and Route (PnR) methodologies. In-depth knowledge and experience with Clock Tree Synthesis (CTS). Hands-on expertise with physical verification tools such as Calibre. Strong background in ASIC Design and VLSI technologies. Ability to work onsite at office locations in Bangalore or Pune. Experience with Static Timing Analysis (STA) and timing closure. Knowledge of sub-micron technology nodes (e.g., 7nm, 5nm). Familiarity with industry-standard EDA tools for physical implementation.
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PHYSICAL DESIGN ENGINEERS (3 POSITIONS) @ SKALENSEMI

0 Negotiable or Not Mentioned India 14 days ago skalensemi.com 684 Views

SkalenSemi is seeking experienced Physical Design Engineers to join our dynamic team in India. This role is crucial for our high-performance chip design projects, focusing on advanced technology nodes and complex integrated circuits. Candidates will be responsible for the complete physical design flow, ensuring high-quality netlist-to-GDSII implementation while meeting stringent power, performance, and area goals. The available work locations for these positions include Bangalore and Pune, operating under an onsite work model.

The ideal candidate will have between 6 and 12 years of relevant industry experience and a strong background in VLSI design. Key responsibilities include managing placement and routing (PnR), performing clock tree synthesis (CTS), and conducting final sign-off procedures using industry-standard verification tools like Calibre. We are looking for individuals with a proven track record in ASIC design and chip implementation who are ready to contribute to cutting-edge technology developments. There are currently 3 open positions available for this role.

Key Requirements

Minimum 6 to 12 years of professional experience in Physical Design. Strong hands-on expertise in the entire Physical Design flow from netlist to GDSII. Extensive experience with sign-off processes including timing, power, and physical verification. Proficiency in Placement and Routing (PnR) techniques and industry-standard tools. Demonstrated expertise in Clock Tree Synthesis (CTS) for high-frequency designs. Practical experience using Calibre for DRC, LVS, and Antenna checks. Solid understanding of ASIC Design methodologies and chip architecture. Proven track record in Chip Design and implementation on advanced process nodes. Ability to work effectively in an onsite environment in Bangalore or Pune. Excellent technical problem-solving skills and the ability to work in a collaborative team environment.
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DESIGN VERIFICATION ENGINEER @ TIMES SEMICONDUCTORS

0 Negotiable or Not Mentioned India 11 days ago GMAIL.COM 434 Views

Times Semiconductors is hiring Design Verification Engineers to join our prominent engineering teams across India. You will be responsible for creating robust verification strategies for complex SoC and ASIC designs, utilizing UVM and SystemVerilog. This position offers the chance to work on high-impact projects that define the future of the global semiconductor industry.

Work locations include top Indian cities like Bengaluru, Hyderabad, Chennai, Noida, Visakhapatnam, and Kochi. We welcome applications from engineers at all stages of their careers who are passionate about semiconductor innovation. This role requires a strong academic background in electronics and communication or electrical engineering and a dedication to high-quality design verification standards.

Key Requirements

B.E/B.Tech or M.E/M.Tech in ECE/EEE or related fields. Graduation date falling between 2012 and 2026. Expertise in SystemVerilog and UVM (Universal Verification Methodology). Experience developing testbenches and verification environments from scratch. Proficiency in scripting with Python, Perl, or TCL. Hands-on experience with simulation tools like VCS, Xcelium, or Questa. In-depth knowledge of coverage-driven verification and assertion-based verification. Strong debugging skills and ability to analyze complex RTL code. Knowledge of computer architecture and digital logic design fundamentals. Ability to work effectively within a cross-functional team environment.
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EXPERIENCED ENGINEERING TEAM LEAD @ SILICONUS TECHNOLOGIES

0 Negotiable or Not Mentioned India 53 days ago siliconus.com 537 Views

SiliconuS Technologies is currently seeking highly skilled and experienced professionals with 5 to 10 years of expertise to join our dynamic and growing team. This role is designed for individuals who are ready to transition into a leadership position or are already successfully leading engineering teams. We are looking for candidates who bring deep technical knowledge and a passion for innovation to help drive our company's mission forward in th

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STA AND SYNTHESIS(LEC) ENGINEERS @ SKALEN SEMI

0 Negotiable or Not Mentioned India 31 days ago skalensemi.com 1089 Views

Skalen Semi is looking to recruit highly skilled STA and Synthesis(LEC) Engineers with a minimum of 6 to 12 years of experience. These positions are open for candidates who have previously worked with global design services powerhouses and are proficient in the semiconductor field. The primary work locations for these roles are Bangalore and Hyderabad, where engineers will tackle complex design challenges. Candidates will be expected to work within a fast-paced environment and deliver high-quality results for our global clients in the design services industry. Responsibilities include performing Static Timing Analysis, Synthesis, and Logic Equivalence Checks. Candidates should be well-versed in tools such as PrimeTime, Tempus, DesignCompiler, and Genus. Knowledge of timing closure, IR drop analysis, and RTL2Gates processes is crucial for success in this role. The opportunity involves working on advanced nodes and contributing to the development of cutting-edge SoC and ASIC designs. Successful hires will collaborate with multi-disciplinary teams to ensure hardware performance meets stringent design goals and timing requirements.

Key Requirements

Minimum 6 to 12 years of experience in VLSI or semiconductor design. In-depth knowledge of Static Timing Analysis (STA) and timing closure. Proficiency in Synthesis and Logic Equivalence Check (LEC) workflows. Experience with industry-standard tools like PrimeTime or Tempus. Hands-on experience with RTL2Gates, DesignCompiler, or Genus. Understanding of MMMC (Multi-Mode Multi-Corner) analysis and SDF. Knowledge of IR Drop and EM Analysis for integrated circuits. Experience with advanced technology nodes (e.g., 7nm, 5nm). Ability to perform Clock Tree Analysis (CTS) and Power Optimization. Strong technical background in ASIC and SoC design methodologies.
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SENIOR STA DESIGNER @ TECHEDGE SOLUTION

0 Negotiable or Not Mentioned India 20 days ago techedge-solution.com 575 Views

TechEdge Solution is seeking experienced professionals for the role of Senior Designer (STA). This position is ideal for candidates with over 7 years of expertise in VLSI and Physical Design, specifically focusing on timing analysis and design methodologies. The role involves working on high-stakes projects where you will ensure high-quality, consistent, and user-friendly design outputs. We are specifically looking for immediate joiners or those with a notice period of up to 30 days to join our dynamic engineering team.

Key responsibilities include collaborating with various stakeholders to understand complex design requirements, developing prototypes, and validating design concepts. You will work closely with cross-functional teams including Development, QA, and Product to ensure project success. Additionally, as a Senior Designer, you will be expected to mentor junior team members and provide technical leadership. Possible work locations for this role within India include Bangalore, Hyderabad, Chennai, and Noida. Preferred skills include familiarity with UX principles and design tools like Figma or Adobe XD to enhance cross-disciplinary collaboration.

Key Requirements

Strong experience in Static Timing Analysis (STA) Expertise in Constraint Development and TCL Scripting Good understanding of Synthesis (Syn) and APR (Place and Route) Proven experience in Timing Closure and Physical Design At least 7 years of relevant industry experience for Bangalore, Hyderabad, Chennai, or Noida locations Minimum of 15 years of experience specifically for senior-level placement in Bangalore Ability to collaborate with stakeholders to understand design requirements Experience developing prototypes and validating design concepts Capability to work closely with cross-functional teams including Dev, QA, and Product Strong mentorship skills for guiding junior team members
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JUNIOR DEVOPS ENGINEER @ UST

0 Negotiable or Not Mentioned India 51 days ago ust.com 525 Views

UST is seeking motivated Junior DevOps Engineers to contribute to our expanding cloud infrastructure team. In this role, you will be responsible for maintaining and optimizing our containerized environments, ensuring high availability and scalability for our enterprise applications. You will collaborate closely with development and operations teams to automate workflows and implement robust CI/CD pipelines using modern tools and practices. This i

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JAVA DEVELOPER @ CLOGIC SOFTTECH

0 Negotiable or Not Mentioned India 52 days ago clogicsofttech.com 534 Views

Clogic Softtech is seeking a highly skilled Java Developer to join our team as part of a leading MNC. This role involves designing, developing, and maintaining complex enterprise-level applications, ensuring high performance and responsiveness. You will work closely with other developers and stakeholders to deliver quality software solutions that meet business requirements in a fast-paced environment. The position is available for professionals w

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AI/ML ENGINEER @ CLOGIC SOFTTECH

0 Negotiable or Not Mentioned India 52 days ago clogicsofttech.com 534 Views

As an AI/ML Engineer at Clogic Softtech, you will be at the forefront of technological innovation, working for a top-tier MNC. You will design, implement, and optimize machine learning models and artificial intelligence systems to solve complex business problems. This role involves data processing, model evaluation, and staying updated with the latest advancements in the AI field to ensure our solutions remain cutting-edge. We are looking for pro

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BUSINESS ANALYST @ CLOGIC SOFTTECH

0 Negotiable or Not Mentioned India 52 days ago clogicsofttech.com 534 Views

Clogic Softtech is seeking a detail-oriented Business Analyst to act as a bridge between our business stakeholders and technical teams. In this role, you will be responsible for gathering requirements, documenting business processes, and ensuring that the final software products align with client needs. You will work within an MNC environment that values clear communication and efficient project management strategies. The ideal candidate has 3 to

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.NET DEVELOPER @ CLOGIC SOFTTECH

0 Negotiable or Not Mentioned India 52 days ago clogicsofttech.com 534 Views

We are looking for an experienced .NET Developer to join Clogic Softtech, a leading MNC. The successful candidate will be responsible for building and maintaining robust software applications using the Microsoft stack. You will be involved in all stages of the software development lifecycle, from requirements analysis to deployment and maintenance. Our team provides an excellent platform for career growth and skill development. This role requires

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PHP DEVELOPER @ CLOGIC SOFTTECH

0 Negotiable or Not Mentioned India 52 days ago clogicsofttech.com 534 Views

Clogic Softtech is hiring a PHP Developer for its offices in Bhubaneswar and Bangalore. This role requires a developer who is passionate about building scalable web applications and has a strong foundation in backend technologies. You will work within an agile team to deliver high-quality code and participate in regular code reviews to maintain industry standards. The candidate should have 3 to 7 years of hands-on experience in PHP development an

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APPLICATION DEVELOPER – CLOUD FULLSTACK (POLARIS EPM) (2 POSITIONS) @ COGENCY

0 Negotiable or Not Mentioned India 17 days ago cogency.net 808 Views

Cogency is currently seeking skilled professionals for the position of Application Developer – Cloud FullStack, focusing on Polaris EPM architecture. This role is positioned within the Distribution sector and involves driving enterprise transformation projects through high-quality technical solutions. The candidate will be responsible for designing and implementing Polaris EPM solutions, working on complex calculations, and managing environment strategies to ensure system stability and growth. Due to the nature of the projects, a face-to-face interview is required, and the selected candidates must comply with a mandatory Day 1 onsite reporting policy.

Key responsibilities include leading solution design efforts, optimizing system performance, and implementing automation to improve efficiency. The role also requires driving governance best practices and managing client requirements from inception to delivery. Beyond technical tasks, the developer will mentor team members and support the adoption of new systems. This is an excellent opportunity for developers with at least one to five years of experience who are looking to work on large-scale enterprise performance solutions in a dynamic and collaborative environment.

Key Requirements

Strong expertise in Polaris EPM architecture and enterprise performance solutions. Proven experience in managing complex Data Integrations. Ability to perform Performance Tuning and optimize system efficiency. Expertise in Automation within the EPM landscape. Demonstrated skills in Solution Design and technical leadership. Experience working on complex calculations and environment strategies. Knowledge of driving governance best practices for enterprise systems. Ability to gather and manage end-to-end client requirements effectively. Strong interpersonal skills to mentor team members and support delivery. Minimum of 1 to 5+ years of relevant experience in software development. Must be willing to undergo a face-to-face interview process. Availability for mandatory Day 1 onsite reporting.
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SQL DEVELOPER / DATABASE INTERN @ CUTOFFDEKHO.COM

0 Negotiable or Not Mentioned India, Remote 8 days ago gmail.com 789 Views

CutoffDekho.com is seeking SQL Developer and Database Interns for a focused 1-month remote internship program. This role is ideal for those interested in the technical aspects of data management, offering the chance to work on live database projects with guidance from experienced mentors. The internship is 100% free and provides a solid foundation for a career in database administration or backend development.

Interns who successfully complete the program will be awarded a completion certificate and may be eligible for full-time job roles with a monthly compensation of ₹18K to ₹25K. This work-from-home position is part of a global initiative, welcoming applicants from regions including Afghanistan, the UAE, and multiple states across India.

Key Requirements

Foundational knowledge of SQL queries. Understanding of relational database management systems. Interest in data structures and database design. Strong logical and analytical problem-solving skills. Ability to commit to a 1-month live project schedule. Willingness to work under the guidance of technical mentors. Basic understanding of data normalization techniques. Self-motivated to learn complex technical concepts. Ability to troubleshoot simple database issues. Capacity to work efficiently in a remote setting.
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SCRUM MASTER @ EPAM

0 Negotiable or Not Mentioned India 24 days ago epam.com 1451 Views

We are looking for a dynamic Scrum Master who is passionate about driving Agile excellence and enabling high-performing cross-functional teams. The ideal candidate will have strong expertise in Agile and SAFe methodologies, with hands-on experience supporting complex delivery teams. You will play a crucial role in managing AI/ML-related projects, ensuring that teams are aligned with business goals while maintaining a focus on continuous improvement and efficiency. The role requires a blend of technical understanding and exceptional soft skills to manage diverse stakeholders and foster a collaborative environment.

The successful candidate will be responsible for guiding teams through end-to-end delivery cycles, removing blockers, and facilitating key ceremonies to ensure project success. This position is open for candidates located in or willing to work in Chennai or Coimbatore. You will be part of an innovative ecosystem that leverages cutting-edge AI technologies to solve real-world problems. If you are an Agile enthusiast who thrives in fast-paced, tech-driven environments, this is an excellent opportunity to grow your career with a global leader.

Key Requirements

Strong experience as a Scrum Master in Agile and SAFe environments. Proven ability to guide cross-functional teams and drive end-to-end delivery. Exposure to AI/ML projects or working in AI-driven ecosystems. Excellent communication, facilitation, and stakeholder management skills. Ability to join immediately or within a short notice period. Proficiency in using JIRA for tracking and managing sprints. Deep understanding of the Software Development Life Cycle (SDLC). Experience in removing impediments and fostering a self-organizing team culture. Ability to facilitate Scrum ceremonies including Daily Stand-ups, Sprint Planning, and Retrospectives. Strong analytical and problem-solving skills to navigate complex delivery challenges.
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GENAI ENGINEER (1 POSITION) @ GSPANN

0 Negotiable or Not Mentioned India 31 days ago gspann.com 1646 Views

We are looking for an experienced GenAI Engineer to join the GSPANN team to work on cutting-edge generative technologies. This position is available in several key Indian locations including Gurugram, Hyderabad, and Pune. As a senior member of the team with over 6 years of experience, you will lead the development of innovative generative AI applications and frameworks that drive business value. The role requires deep expertise in Python, SQL, and MLOps to manage the entire lifecycle of generative models. You will be responsible for designing and implementing AI solutions, working closely with data scientists and software engineers to create impactful products. This is an opportunity to be at the forefront of the AI revolution and contribute to high-visibility projects within a global organization.

Key Requirements

At least 6 years of relevant experience in software or data engineering. Expert-level proficiency in Python programming. Strong command of SQL for data manipulation and analysis. Extensive knowledge of Generative AI concepts and frameworks. Proven experience with MLOps for model deployment and monitoring. Solid background in Data Science methodologies. General expertise in Artificial Intelligence and Machine Learning. Experience with Large Language Models (LLMs) and fine-tuning. Understanding of neural network architectures and transformers. Ability to collaborate with cross-functional teams on complex projects.
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EMBEDDED SOFTWARE DEVELOPER (C++ WITH LINUX/RTOS) @ HAPPIEST MINDS TECHNOLOGIES

0 Negotiable or Not Mentioned India 26 days ago happiestminds.com 1646 Views

Happiest Minds Technologies is conducting a hiring drive for experienced Embedded Developers to join our innovative team in India, specifically targeting talent for our Bengaluru and Pune locations. This opportunity is ideal for professionals with 5 to 12 years of experience who are passionate about embedded engineering and looking to make a significant impact in an AI-First environment. The roles involve engineering low-level drivers to ensure seamless hardware communication and collaborating on embedded solutions that integrate firmware stability with software innovation. Candidates will architect and define APIs and applications that scale across connected devices, ensuring high performance and security across the board. The hiring drive is scheduled for 28 March from 9 AM to 5 PM at the Bengaluru (Madivala) venue. Possible work locations mentioned include Bengaluru and Pune. The company offers a vibrant environment where embedded expertise powers intelligent systems, making it a top workplace for tech professionals. Key tasks include low-level driver development using I2C, SPI, and UART protocols, as well as socket programming with HTTP and TCP/IP. Be part of a journey where software innovation meets firmware stability to power the next generation of connected devices.

Key Requirements

Minimum 5 to 12 years of experience in embedded software development. Strong proficiency in C++ programming for embedded systems. Hands-on expertise with Linux or Real-Time Operating Systems (RTOS). Proven experience working with various microprocessors and microcontrollers. Skilled in low-level driver development including I2C, SPI, and UART. Ability to architect and define APIs for scalable applications. Knowledge of socket programming using protocols like HTTP and TCP/IP. Experience in developing C++ software libraries and firmware integration. Capability to lead embedded solutions and collaborate with cross-functional teams. Strong understanding of hardware-software communication and system security.
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GEN AI / LLM SPECIALIST @ INFOGINE

0 Negotiable or Not Mentioned India, Remote / Hybrid 11 days ago infogine.com 248 Views

Join a forward-thinking team dedicated to developing cutting-edge LLM-based solutions, autonomous AI agents, and RAG pipelines that aim to redefine the future of enterprise AI. As a Gen AI / LLM Specialist, you will be at the forefront of technical innovation, applying advanced AI techniques to solve complex business problems. This role requires a balance of research-oriented thinking and practical application to build robust, scalable AI systems. Possible work locations include remote or hybrid arrangements within India.

The ideal candidate will demonstrate technical leadership in fine-tuning large language models and optimizing prompt engineering workflows. You will collaborate with cross-functional teams to integrate Vector Databases and API frameworks into production-ready environments. A significant portion of the role involves ensuring Responsible AI practices and Agent Safety, maintaining high standards for the ethical deployment of autonomous systems. This position is designed for experienced professionals with a solid foundation in Python, NLP, and Deep Learning who are ready to take on a general shift role in a high-impact environment.

Key Requirements

6–10 years of professional experience in software development or AI research. Demonstrated hands-on expertise with LLM Fine-Tuning and Prompt Engineering. Advanced proficiency in Python programming for data science and AI applications. Strong background in Natural Language Processing (NLP) and Deep Learning methodologies. Proven experience building and optimizing Retrieval-Augmented Generation (RAG) pipelines. Practical knowledge of Vector Databases such as Pinecone, Milvus, or Weaviate. Experience designing and implementing robust API Frameworks for AI model integration. Deep understanding of Responsible AI principles and safety protocols for autonomous agents. Ability to work effectively in a general shift schedule within a hybrid or remote setup. Strong problem-solving skills and the ability to translate business requirements into technical AI solutions.
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ETL DEVELOPER @ SE MENTOR SOLUTIONS

0 Negotiable or Not Mentioned India 20 days ago se-mentor.com 1050 Views

SE Mentor Solutions is seeking a skilled ETL Developer to join our technical team. This role is responsible for designing, developing, and maintaining robust ETL processes to support our data integration needs. You will work closely with data architects and analysts to ensure data quality and system efficiency across various platforms. Possible work locations for this role include Cochin and Bengaluru.

The ideal candidate will have over 4 years of experience with a strong background in Advanced SQL and various ETL tools. You will be expected to optimize database performance, troubleshoot complex data issues, and contribute to the continuous improvement of our data infrastructure. This is an excellent opportunity to work on scalable solutions in a high-growth environment focused on technological innovation and data excellence. No salary was mentioned in the original posting.

Key Requirements

Minimum of 4 years of professional experience in ETL development. Proficiency in Advanced SQL for complex query writing and optimization. Experience with data modeling and database design principles. Proven ability to build and maintain scalable data pipelines. Strong analytical and problem-solving skills for troubleshooting data issues. Knowledge of performance tuning for ETL processes and database systems. Familiarity with version control systems such as Git. Excellent communication skills for collaborating with cross-functional teams. Ability to document technical processes and data workflows clearly. Experience working in an Agile development environment.
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SAP PROJECT MANAGER @ VESTRICS

0 Negotiable or Not Mentioned India, Hyderabad 23 days ago vestrics.in 1172 Views

Join our growing team as an SAP Project Manager based in Hyderabad. We are looking for an experienced professional with over 5 years of expertise in driving impactful SAP projects from conception to delivery. In this role, you will be responsible for leading cross-functional teams, managing stakeholders, and ensuring that all project objectives are met within scope and budget. This is an excellent opportunity for someone who thrives in an innovative and collaborative environment where their expertise directly contributes to business transformation.

As part of our dynamic team, you will oversee end-to-end SAP project lifecycles, utilizing your deep understanding of project management methodologies. You will work closely with diverse departments to align technical solutions with business goals. We value leadership and the ability to navigate complex project environments. If you are ready to take the next big step in your career and contribute to a company focused on growth and innovation, we encourage you to apply by sending your resume to the specified email address.

Key Requirements

5+ years of experience in SAP Project Management Proven experience managing end-to-end SAP projects Strong leadership and stakeholder management skills Expertise in project planning, execution, and delivery Ability to lead cross-functional teams and ensure successful outcomes Strong analytical and problem-solving capabilities Excellent communication and presentation skills Knowledge of SAP implementation methodologies such as ASAP or Activate Bachelor's or Master's degree in IT, Computer Science, or Business Administration Proficiency in project management software tools like MS Project or JIRA
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RTL DESIGN ENGINEER @ TIMES SEMICONDUCTORS

0 Negotiable or Not Mentioned India 11 days ago GMAIL.COM 502 Views

Times Semiconductors is seeking talented RTL Design Engineers to join our expanding team in India. In this role, you will play a pivotal part in designing and developing advanced semiconductor systems, focusing on ASIC and SoC innovation. You will work alongside industry experts to push the boundaries of what is possible in VLSI design and microelectronics.

Candidates can be based in several key tech hubs in India, including Bengaluru, Hyderabad, Chennai, Noida, Visakhapatnam, and Kochi. Whether you are a fresh graduate or an experienced professional, we offer a dynamic platform for career advancement and technical skill development. Eligibility includes B.E/B.Tech or M.E/M.Tech graduates from the batches of 2012 through 2026.

Key Requirements

Bachelor's or Master's degree in ECE, EEE, or related engineering fields. Graduation year between 2012 and 2026. Strong proficiency in Verilog or SystemVerilog for hardware description. Knowledge of SoC integration processes and methodologies. Experience with scripting languages such as Python, TCL, or Perl. Familiarity with industry-standard EDA tools like VCS, Xcelium, or Questa. Solid understanding of digital logic design and computer architecture. Ability to work in a fast-paced environment on complex ASIC projects. Excellent analytical and problem-solving skills for debugging design issues. Strong communication skills for collaborating with global engineering teams.
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0 Negotiable or Not Mentioned India, Remote 30 days ago carbonsoftinc.com 408 Views

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