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DESIGN VERIFICATION (DV) ENGINEERS @ KARASHATECH

0 Negotiable or Not Mentioned India, Hyderabad 11 days ago karashatech.com 813 Views

KarashaTech is seeking highly skilled and experienced Design Verification (DV) Engineers to join our rapidly growing technical team in Hyderabad. In this role, you will be responsible for the verification of complex integrated circuits, ensuring that designs meet functional requirements and power specifications. You will work closely with design teams to define verification strategies and develop robust testbenches that leverage advanced industry methodologies. This is an excellent opportunity for a professional looking to work on cutting-edge semiconductor projects within a collaborative and innovative environment.The successful candidate will demonstrate a deep understanding of the full verification lifecycle, from planning to coverage closure. You will be expected to handle power-aware simulations and debug intricate issues across RTL and UPF models. With a requirement for at least five years of experience, we are looking for engineers who can hit the ground running and contribute to our high-standards of silicon quality. Candidates with a short notice period are highly preferred to meet our current project timelines.

Key Requirements

Minimum of 5 years of professional experience in Design Verification. Strong hands-on experience with SystemVerilog for verification. Advanced proficiency in Universal Verification Methodology (UVM). Solid understanding of Unified Power Format (UPF) and Power Intent Modeling. Proven experience conducting Power-Aware Simulations. In-depth knowledge of Power Domains and Power States. Familiarity with Isolation, Retention, and Level Shifters within designs. Understanding of the interactions between Reset and Power states. Strong debugging skills across RTL, UPF, and various Testbench environments. Ability to join within a short notice period of approximately 15 days.
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DDR VERIFICATION ENGINEER @ GSVR TALENT SOLUTIONS PVT LTD

0 Negotiable or Not Mentioned India 18 days ago gsvrtalent.com 988 Views

GSVR Talent Solutions Pvt Ltd is hiring experienced DDR Verification Engineers to join their high-performance semiconductor team. This role involves working on cutting-edge technology including next-generation AI chips and high-speed memory interfaces. The chosen candidate will be responsible for the verification of DDR3, DDR4, DDR5, and LPDDR4/LPDDR5 controllers, ensuring that every memory transaction behaves exactly as expected before silicon production. You will develop UVM-based verification environments using DDR VIPs and work closely with senior VLSI engineering teams.

In this position, you will create and debug complex memory traffic scenarios and ensure strict protocol compliance through functional coverage closure. The role requires a strong debugging and analytical mindset to solve intricate hardware validation challenges. By joining this project, you will contribute to the development of high-performance computing systems and collaborate with experts in the VLSI industry to deliver reliable hardware solutions for modern technology infrastructures.

Key Requirements

At least 4 years of professional experience in Design Verification within the VLSI or semiconductor industry. Strong technical knowledge of DDR protocols including DDR3, DDR4, and DDR5. Hands-on expertise with LPDDR4 and LPDDR5 memory architectures and controllers. Proven experience in developing and maintaining UVM-based (Universal Verification Methodology) environments. Advanced proficiency in using SystemVerilog for hardware verification tasks. Direct experience working with DDR Verification IPs (VIPs) and associated debugging tools. Ability to create, simulate, and debug complex memory traffic scenarios for validation. Demonstrated ability to ensure protocol compliance and achieve functional coverage closure. A strong debugging and analytical mindset to resolve architectural and functional issues. Ability to collaborate effectively with cross-functional engineering teams on high-performance computing projects.
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DESIGN VERIFICATION ENGINEER @ TIMES SEMICONDUCTORS

0 Negotiable or Not Mentioned India 11 days ago GMAIL.COM 499 Views

Times Semiconductors is hiring Design Verification Engineers to join our prominent engineering teams across India. You will be responsible for creating robust verification strategies for complex SoC and ASIC designs, utilizing UVM and SystemVerilog. This position offers the chance to work on high-impact projects that define the future of the global semiconductor industry.

Work locations include top Indian cities like Bengaluru, Hyderabad, Chennai, Noida, Visakhapatnam, and Kochi. We welcome applications from engineers at all stages of their careers who are passionate about semiconductor innovation. This role requires a strong academic background in electronics and communication or electrical engineering and a dedication to high-quality design verification standards.

Key Requirements

B.E/B.Tech or M.E/M.Tech in ECE/EEE or related fields. Graduation date falling between 2012 and 2026. Expertise in SystemVerilog and UVM (Universal Verification Methodology). Experience developing testbenches and verification environments from scratch. Proficiency in scripting with Python, Perl, or TCL. Hands-on experience with simulation tools like VCS, Xcelium, or Questa. In-depth knowledge of coverage-driven verification and assertion-based verification. Strong debugging skills and ability to analyze complex RTL code. Knowledge of computer architecture and digital logic design fundamentals. Ability to work effectively within a cross-functional team environment.
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RTL DESIGN ENGINEER @ SKALEN SEMI

0 Negotiable or Not Mentioned India 28 days ago skalensemi.com 1175 Views

Skalen Semi is seeking an experienced RTL Design Engineer to join a dynamic team working with global design services powerhouses. The role involves deep involvement in high-performance and low-power RTL development, microarchitecture definition, and SoC architecture design. You will be responsible for creating synthesis-ready RTL, managing timing closure (STA), and ensuring logical equivalence using tools such as Conformal or Formality.

This position is available in both Bangalore and Hyderabad. Candidates must have significant experience in the semiconductor industry, specifically within ASIC and chip design environments. Please note that this is a senior-level position requiring 6 to 12 years of relevant experience; applications from freshers or interns are not being accepted at this time.

Key Requirements

6 to 12 years of professional experience in RTL Design and Development. Proven expertise in Microarchitecture and SoC Architecture design. Proficiency in Hardware Description Languages (HDL) like SystemVerilog and Verilog. Experience in IP Design and Subsystem Design for high-performance systems. Solid understanding of Low Power RTL design and Clocking Architecture. Familiarity with Pipeline Design and Bus/Interconnect architectures. Demonstrated ability to deliver Synthesis-Ready RTL and achieve Timing Closure (STA). Hands-on experience with LEC tools such as Conformal or Formality. Knowledge of DFT-ready RTL design and implementation best practices. Strong background in ASIC design flows and the semiconductor industry.
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RTL DESIGN ENGINEER @ TIMES SEMICONDUCTORS

0 Negotiable or Not Mentioned India 11 days ago GMAIL.COM 900 Views

Times Semiconductors is seeking talented RTL Design Engineers to join our expanding team in India. In this role, you will play a pivotal part in designing and developing advanced semiconductor systems, focusing on ASIC and SoC innovation. You will work alongside industry experts to push the boundaries of what is possible in VLSI design and microelectronics.

Candidates can be based in several key tech hubs in India, including Bengaluru, Hyderabad, Chennai, Noida, Visakhapatnam, and Kochi. Whether you are a fresh graduate or an experienced professional, we offer a dynamic platform for career advancement and technical skill development. Eligibility includes B.E/B.Tech or M.E/M.Tech graduates from the batches of 2012 through 2026.

Key Requirements

Bachelor's or Master's degree in ECE, EEE, or related engineering fields. Graduation year between 2012 and 2026. Strong proficiency in Verilog or SystemVerilog for hardware description. Knowledge of SoC integration processes and methodologies. Experience with scripting languages such as Python, TCL, or Perl. Familiarity with industry-standard EDA tools like VCS, Xcelium, or Questa. Solid understanding of digital logic design and computer architecture. Ability to work in a fast-paced environment on complex ASIC projects. Excellent analytical and problem-solving skills for debugging design issues. Strong communication skills for collaborating with global engineering teams.
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STA AND SYNTHESIS(LEC) ENGINEERS @ SKALEN SEMI

0 Negotiable or Not Mentioned India 31 days ago skalensemi.com 1086 Views

Skalen Semi is looking to recruit highly skilled STA and Synthesis(LEC) Engineers with a minimum of 6 to 12 years of experience. These positions are open for candidates who have previously worked with global design services powerhouses and are proficient in the semiconductor field. The primary work locations for these roles are Bangalore and Hyderabad, where engineers will tackle complex design challenges. Candidates will be expected to work within a fast-paced environment and deliver high-quality results for our global clients in the design services industry. Responsibilities include performing Static Timing Analysis, Synthesis, and Logic Equivalence Checks. Candidates should be well-versed in tools such as PrimeTime, Tempus, DesignCompiler, and Genus. Knowledge of timing closure, IR drop analysis, and RTL2Gates processes is crucial for success in this role. The opportunity involves working on advanced nodes and contributing to the development of cutting-edge SoC and ASIC designs. Successful hires will collaborate with multi-disciplinary teams to ensure hardware performance meets stringent design goals and timing requirements.

Key Requirements

Minimum 6 to 12 years of experience in VLSI or semiconductor design. In-depth knowledge of Static Timing Analysis (STA) and timing closure. Proficiency in Synthesis and Logic Equivalence Check (LEC) workflows. Experience with industry-standard tools like PrimeTime or Tempus. Hands-on experience with RTL2Gates, DesignCompiler, or Genus. Understanding of MMMC (Multi-Mode Multi-Corner) analysis and SDF. Knowledge of IR Drop and EM Analysis for integrated circuits. Experience with advanced technology nodes (e.g., 7nm, 5nm). Ability to perform Clock Tree Analysis (CTS) and Power Optimization. Strong technical background in ASIC and SoC design methodologies.
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PHYSICAL DESIGN ENGINEERS (3 POSITIONS) @ SKALENSEMI

0 Negotiable or Not Mentioned India 14 days ago skalensemi.com 681 Views

SkalenSemi is seeking experienced Physical Design Engineers to join our dynamic team in India. This role is crucial for our high-performance chip design projects, focusing on advanced technology nodes and complex integrated circuits. Candidates will be responsible for the complete physical design flow, ensuring high-quality netlist-to-GDSII implementation while meeting stringent power, performance, and area goals. The available work locations for these positions include Bangalore and Pune, operating under an onsite work model.

The ideal candidate will have between 6 and 12 years of relevant industry experience and a strong background in VLSI design. Key responsibilities include managing placement and routing (PnR), performing clock tree synthesis (CTS), and conducting final sign-off procedures using industry-standard verification tools like Calibre. We are looking for individuals with a proven track record in ASIC design and chip implementation who are ready to contribute to cutting-edge technology developments. There are currently 3 open positions available for this role.

Key Requirements

Minimum 6 to 12 years of professional experience in Physical Design. Strong hands-on expertise in the entire Physical Design flow from netlist to GDSII. Extensive experience with sign-off processes including timing, power, and physical verification. Proficiency in Placement and Routing (PnR) techniques and industry-standard tools. Demonstrated expertise in Clock Tree Synthesis (CTS) for high-frequency designs. Practical experience using Calibre for DRC, LVS, and Antenna checks. Solid understanding of ASIC Design methodologies and chip architecture. Proven track record in Chip Design and implementation on advanced process nodes. Ability to work effectively in an onsite environment in Bangalore or Pune. Excellent technical problem-solving skills and the ability to work in a collaborative team environment.
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SENIOR STA DESIGNER @ TECHEDGE SOLUTION

0 Negotiable or Not Mentioned India 20 days ago techedge-solution.com 574 Views

TechEdge Solution is seeking experienced professionals for the role of Senior Designer (STA). This position is ideal for candidates with over 7 years of expertise in VLSI and Physical Design, specifically focusing on timing analysis and design methodologies. The role involves working on high-stakes projects where you will ensure high-quality, consistent, and user-friendly design outputs. We are specifically looking for immediate joiners or those with a notice period of up to 30 days to join our dynamic engineering team.

Key responsibilities include collaborating with various stakeholders to understand complex design requirements, developing prototypes, and validating design concepts. You will work closely with cross-functional teams including Development, QA, and Product to ensure project success. Additionally, as a Senior Designer, you will be expected to mentor junior team members and provide technical leadership. Possible work locations for this role within India include Bangalore, Hyderabad, Chennai, and Noida. Preferred skills include familiarity with UX principles and design tools like Figma or Adobe XD to enhance cross-disciplinary collaboration.

Key Requirements

Strong experience in Static Timing Analysis (STA) Expertise in Constraint Development and TCL Scripting Good understanding of Synthesis (Syn) and APR (Place and Route) Proven experience in Timing Closure and Physical Design At least 7 years of relevant industry experience for Bangalore, Hyderabad, Chennai, or Noida locations Minimum of 15 years of experience specifically for senior-level placement in Bangalore Ability to collaborate with stakeholders to understand design requirements Experience developing prototypes and validating design concepts Capability to work closely with cross-functional teams including Dev, QA, and Product Strong mentorship skills for guiding junior team members
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PHYSICAL DESIGN ENGINEERS (3 POSITIONS) @ SKALENSEMI

0 Negotiable or Not Mentioned India 13 days ago skalensemi.com 656 Views

SkalenSemi is seeking experienced Physical Design Engineers for three open positions to join our team in India. This role requires individuals with a strong background in the full physical design cycle, from floorplanning to sign-off. Candidates will be expected to work on-site at our facilities in either Bangalore or Pune, contributing to cutting-edge ASIC and chip design projects. The work model is strictly onsite, ensuring close collaboration with our technical teams in these key technology hubs.

The successful candidates will have between 6 to 12 years of relevant industry experience in the semiconductor field. Key responsibilities include handling complex physical design tasks such as Place and Route (PnR), Clock Tree Synthesis (CTS), and sign-off verification using industry-standard tools like Calibre. A robust understanding of VLSI design and the ability to ensure high-quality design outcomes are essential for this position. This is an excellent opportunity to grow within a dynamic technical environment focused on semiconductor innovation and high-performance chip design.

Key Requirements

6-12 years of professional experience in Physical Design. Strong hands-on experience in Physical Design flow and sign-off processes. Proficiency in Place and Route (PnR) methodologies. In-depth knowledge and experience with Clock Tree Synthesis (CTS). Hands-on expertise with physical verification tools such as Calibre. Strong background in ASIC Design and VLSI technologies. Ability to work onsite at office locations in Bangalore or Pune. Experience with Static Timing Analysis (STA) and timing closure. Knowledge of sub-micron technology nodes (e.g., 7nm, 5nm). Familiarity with industry-standard EDA tools for physical implementation.
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.NET FULL STACK DEVELOPERS @ PERFICIENT INDIA

0 Negotiable or Not Mentioned India 8 days ago perficient.com 617 Views

Perficient India is expanding its technical team and is currently seeking experienced .NET Full Stack Developers to join our offices in various locations across India, including Hyderabad, Bangalore, Chennai, Pune, and Nagpur. The ideal candidate will have over 5 years of professional experience and a strong background in developing robust applications using modern tech stacks. This is a full-time, hybrid role requiring three days of work from the office, providing a blend of flexibility and a collaborative team environment to drive high-impact digital solutions.

The role involves working with cutting-edge technologies like ASP.NET Core, Angular, and AWS Cloud. Successful candidates will be responsible for end-to-end development, from designing responsive user interfaces with TypeScript and Angular to implementing secure back-end services and scalable cloud infrastructure. We are looking for immediate joiners who can participate in a mandatory face-to-face interview process. Joining Perficient means becoming part of a dynamic team that values innovation and technical excellence in delivering world-class software solutions for a global client base.

Key Requirements

Minimum of 5 years of experience in software development. Proficiency in .NET and ASP.NET Core frameworks. Hands-on experience with Angular and TypeScript for front-end development. Strong understanding of AWS Cloud services and implementation. Proven experience in Full Stack development methodologies. Willingness to participate in a mandatory face-to-face interview round. Ability to work in a hybrid model with 3 days in the office. Notice period of 15 days or less (immediate joiners preferred). Strong knowledge of C# programming and object-oriented design. Experience with SQL Server or other relational database systems. Familiarity with building and consuming RESTful APIs. Excellent problem-solving skills and attention to technical detail.
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BACKEND DEVELOPER @ MOBILUTION IT SYSTEMS

0 Negotiable or Not Mentioned India 31 days ago mobilutionit.com 1962 Views

Mobilution IT Systems is currently seeking a skilled and experienced Backend Developer to join our dynamic team on a contract basis. This role is ideal for professionals with 4 to 10 years of experience who are proficient in Python and modern web frameworks. As a Backend Developer, you will be responsible for designing, developing, and maintaining robust server-side logic and ensuring high performance and responsiveness to requests from the front-end. You will work closely with other developers and stakeholders to build scalable solutions using technologies like FastAPI, PostgreSQL, and Pandas.

This position offers a hybrid work mode, allowing for flexibility while maintaining a connection with the team. The possible work locations within India include Hyderabad, Bengaluru, Chennai, Gurgaon, Mumbai, Pune, and Kolkata. Candidates should have a strong background in event-driven architecture and a passion for creating efficient, high-quality code. Join us to work on innovative projects and contribute to the growth of Mobilution IT Systems. The salary for this position is competitive based on industry standards.

Key Requirements

Minimum of 4 to 10 years of professional experience in backend development. Proficiency in Python programming language. Hands-on experience with the FastAPI framework for building APIs. Strong knowledge and experience with PostgreSQL database management. Expertise in using Pandas for data manipulation and analysis. Solid understanding of event-driven architecture and its implementation. Ability to work effectively in a hybrid model across various locations. Experience with asynchronous programming and microservices. Excellent problem-solving skills and attention to detail. Strong communication and collaborative skills for teamwork environments.
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PYTHON DEVELOPER @ SWETHA ESQUAREINFO

0 Negotiable or Not Mentioned India, Hyderabad 28 days ago esquareinfo.com 1308 Views

We are seeking a seasoned Python Developer to join our team in Hyderabad to work on complex, business-critical systems. This role requires a high level of technical expertise and the ability to collaborate with various cross-functional teams to ensure the successful delivery of software solutions. The developer will be responsible for managing multiple projects across different domains, ensuring that all systems are robust and scalable to meet enterprise demands.

The ideal candidate should have a strong background in Python development and significant experience with cloud platforms such as AWS and Azure. Exposure to AI and data-driven applications is highly desirable, as it will play a key role in the future direction of our technical landscape. This position offers a hybrid work model, combining the benefits of remote work with the collaborative environment of our Hyderabad office. Successful applicants will demonstrate a proactive approach to problem-solving and a commitment to maintaining high standards of software quality in an enterprise environment.

Key Requirements

6 to 8 years of professional experience in Python development. Proven expertise in working with AWS cloud services. Significant experience with Microsoft Azure platforms. Demonstrated history of developing AI or Data-driven applications. Experience working on business-critical systems and enterprise software. Strong ability to collaborate with cross-functional teams and stakeholders. Competency in managing and delivering multiple projects across various domains. Excellent problem-solving and analytical skills in a technical environment. Solid understanding of software development life cycle (SDLC) best practices. Proficiency in database management and system integration.
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FRONTEND TECH LEAD (REACT) @ XAUTOMATIONS

0 Negotiable or Not Mentioned India, Hyderabad 17 days ago xautomations.com 1212 Views

xautomations is hiring a Frontend Tech Lead with specialized expertise in React to lead our web development efforts in Hyderabad. This leadership role involves overseeing the creation of intuitive and high-performance user interfaces for our real-time data platforms. You will be responsible for defining technical standards, selecting appropriate tools, and ensuring the delivery of high-quality frontend solutions that meet user needs.

In addition to hands-on development, you will guide and mentor a team of engineers, fostering a culture of technical excellence and continuous improvement. You will work on building scalable frontend systems that interface with complex backend data pipelines. This is a full-time, office-based role suitable for experienced professionals who are passionate about modern web technologies and leadership.

Key Requirements

Advanced expertise in React.js and its ecosystem. Prior leadership experience in frontend development teams. Strong knowledge of CSS3, HTML5, and modern UI/UX principles. Experience with state management libraries like Redux or Context API. Proven ability to optimize web application performance. Experience leading code reviews and providing technical mentorship. Ability to design architectures for complex, data-heavy frontend apps. Familiarity with frontend testing frameworks and unit testing. Experience collaborating with backend developers and design teams. Knowledge of modern build tools and bundlers like Webpack or Vite.
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AUTOMATION TEST ENGINEER (JAVA/PYTHON) @ AMPSTEK

0 Negotiable or Not Mentioned India 10 days ago ampstek.com 791 Views

Ampstek is currently seeking a highly skilled Automation Test Engineer with 5 to 10 years of experience to join our dynamic team. The ideal candidate will have extensive hands-on experience with Ericsson Mediation or Mediation Zone (MZ) and a strong background in test automation using Java or Python. This role is central to our quality assurance processes within the telecom domain, specifically focusing on CDR, billing, and mediation systems. Candidates will be expected to work with SQL and Unix/Linux environments to ensure the stability and efficiency of our technical solutions.

The positions are available in both Chennai and Pune, India, and we are looking for candidates who can join immediately or within a short notice period. In addition to technical proficiency in API testing and automation frameworks, experience with CI/CD tools like Jenkins or Azure DevOps and working within Agile/Scrum methodologies is highly desirable. This is an excellent opportunity for a professional looking to advance their career in a challenging and innovative telecommunications environment while working with cutting-edge mediation technologies.

Key Requirements

Hands-on experience with Ericsson Mediation / Mediation Zone (MZ) Strong automation skills in Java or Python programming Telecom domain experience (CDR, billing, mediation systems) Good knowledge of SQL for database querying and testing Proficiency in Unix/Linux operating systems and commands Experience in API testing and working with automation frameworks Familiarity with CI/CD tools such as Jenkins or Azure DevOps Working experience in an Agile or Scrum environment Exposure to ETL and Data testing processes Ability to join immediately or within a short notice period Strong analytical and problem-solving skills Excellent communication and teamwork abilities
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ELECTRICAL ENGINEERING POD LEAD @ E-SOLUTIONS INC

0 Negotiable or Not Mentioned India, Remote 16 days ago e-solutionsinc.com 794 Views

This is a specialized remote opportunity for an Electrical Engineering Pod Lead to join a dynamic project for a duration of 22 weeks. The role requires a high level of technical expertise, necessitating a Master's degree or PhD and at least five years of deep hands-on electrical engineering design experience. As a Pod Lead, you will be responsible for owning designs from the initial specification phase through to validated implementation, providing technical leadership and team coordination to ensure project milestones are met effectively within the PST overlap hours.

Candidates must demonstrate advanced proficiency in Python for scripting and automation, alongside hands-on experience with Docker for managing containerized environments. Proficiency in at least one major cloud platform and various open-source EE simulation tools is required. You must have deep expertise in specialized subdomains such as Analog/Mixed-Signal IC Design, Power Electronics, RF Engineering, or Embedded Systems. The role demands a commitment of at least 30 to 40 hours per week, with a critical requirement for a 4-hour daily overlap with Pacific Standard Time.

Key Requirements

Master's degree or PhD in Electrical Engineering or a closely related field. Minimum 5 years of hands-on electrical engineering design experience. Proven track record of owning designs from specification through validated implementation. At least 1–2 years of experience in a technical lead, senior engineer, or team coordination role. Proficiency with Python for scripting, automation, and simulation workflows. Hands-on experience with Docker, including building images and managing containerized environments. Familiarity with cloud platforms such as AWS, GCP, or Azure for running workloads and monitoring jobs. Proficiency with open-source EE simulation tools like ngspice, PySpice, or OpenEMS. Deep expertise in Analog/Mixed-Signal IC Design or Power Electronics. Strong understanding of RF/Microwave Engineering or Digital Systems/FPGA design. Ability to work a minimum of 30-40 hours per week with a 4-hour PST overlap.
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TEST ENGINEER @ ENDEAVOUR TECHNOLOGIES

0 Negotiable or Not Mentioned India, Hyderabad 19 days ago endeavourtechnologies.co.in 1250 Views

Endeavour Technologies is looking for a skilled Test Engineer to join the team in Hyderabad. This role is pivotal in maintaining the quality standards of both web and mobile applications. The successful candidate will be responsible for analyzing requirements, drafting comprehensive test plans, and executing manual and automated test cases. You will be tasked with identifying, reporting, and tracking defects using standard management tools to ensure a seamless user experience and product reliability.

Beyond execution, you will play a key role in developing and maintaining automation test scripts and improving existing test frameworks. Collaboration is central to this position, as you will work alongside developers and product managers to resolve issues and refine technical documentation. This role requires a proactive individual with strong analytical skills and a deep understanding of testing life cycles, ready to contribute effectively to a fast-paced development environment in an office-based setting.

Key Requirements

2-3 years of hands-on experience in software quality assurance. Strong proficiency in Manual and Automation Testing techniques. Solid understanding of Software Testing Life Cycle (STLC). Comprehensive knowledge of Software Development Life Cycle (SDLC). Practical experience with automation tools like Selenium or TestNG. Scripting proficiency in programming languages such as Java or JavaScript. Demonstrated experience in API testing using tools like Postman. Familiarity with defect management and tracking tools like Jira. Excellent analytical thinking and technical problem-solving abilities. Capacity to work full-time from the Hyderabad office.
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QA ENGINEER – AUTOMATION @ SE MENTOR SOLUTIONS

0 Negotiable or Not Mentioned India 20 days ago se-mentor.com 662 Views

SE Mentor Solutions is looking for a dedicated QA Engineer specializing in Automation to support our banking and finance projects. This role involves developing and maintaining automated test scripts using Selenium or Playwright and C#. You will work in a dynamic environment to ensure the quality and reliability of critical financial applications. The work locations for this position include Trivandrum and Cochin.

The ideal candidate will have over 4 years of experience in automation testing, preferably within the Banking or Finance domain. You will be responsible for integrating automated tests into CI/CD pipelines and working closely with developers to identify and resolve software defects early in the development cycle. Your expertise will be key to maintaining high software quality and accelerating our delivery timelines. Salary was not mentioned in the original post provided.

Key Requirements

4+ years of experience in automated software testing. Proficiency in Selenium or Playwright testing frameworks. Strong programming skills in C# for test script development. Prior experience working within the Banking or Finance domain. Knowledge of automated API testing and web application testing. Experience integrating tests into CI/CD pipelines. Familiarity with regression, functional, and performance testing. Excellent documentation skills for test plans and bug reports. Ability to work effectively in an Agile/Scrum environment. Strong communication skills for cross-team collaboration.
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RAN OPERATIONS ENGINEER @ INFORMICA

0 Negotiable or Not Mentioned India 28 days ago informica.co.in 1557 Views

The RAN Operations Engineer role involves critical management and operational support for 5G gNodeB sites and NR clusters. The successful candidate will be responsible for configuration, upgrades, and fault restoration, ensuring seamless end-to-end RAN performance. You will dive deep into troubleshooting complex issues such as call drops, handover failures, and throughput problems, while analyzing key 5G NR KPIs including Accessibility, Retainability, and Mobility. The role demands expertise in mobility and neighbor relations management, including EN-DC, ANR, and PCI/SSB conflicts, to maintain a robust and high-performing network.

This position offers a unique opportunity to work on cutting-edge 5G technologies like CBRS and DU/RU/CU/AU architectures. In addition to monitoring alarms and network health, you will drive network optimization through precise parameter tuning, MIMO configurations, and physical adjustments. This is a contract-to-hire opportunity suitable for experienced professionals with over 8 years of industry experience. Possible work locations for this role include Chennai, Hyderabad, and Bangalore in India.

Key Requirements

At least 8 years of professional experience in RAN operations or telecommunications. Strong technical knowledge of 5G RAN, CBRS, and DU/RU/CU/AU architecture. Proven experience in RAN planning, optimization, and RF fundamentals. Expertise in KPI analysis, Root Cause Analysis (RCA), and performance tuning. Hands-on proficiency with performance analytics and network monitoring tools. Ability to operate and support 5G gNodeB sites and NR clusters including configuration and upgrades. Skilled in end-to-end RAN troubleshooting for call drops, handover failures, and throughput problems. In-depth knowledge of mobility and neighbor relations management such as EN-DC and ANR. Capability to prepare detailed KPI reports, dashboards, and comprehensive optimization plans. Experience with network optimization via parameter tuning, MIMO, and tilt/power adjustments.
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