0 Negotiable or Not Mentioned
USA
13 days ago
skalensemi.com
379 Views
SkalenSemi is currently seeking highly experienced Design Verification Engineers for 20 open positions across the United States. These roles are critical to our semiconductor operations and require professionals with a robust background in the industry, specifically with 6 to 15 years of dedicated experience. The work model is strictly onsite, with potential placements in Austin, Texas; Santa Clara, California; or Boston, Massachusetts. We are looking for candidates who can hit the ground running and contribute to our high-level chip design projects immediately. Please note that these roles are tailored for senior professionals and are not suitable for freshers or entry-level applicants.
In this role, engineers will be responsible for complex verification tasks using advanced methodologies. This includes working with SystemVerilog and UVM to ensure the functional integrity of data fabrics and other sophisticated RTL designs. The job involves applying formal verification techniques and collaborating closely with design teams to meet rigorous quality standards in ASIC development. Successful applicants will join a dynamic technical environment at SkalenSemi, contributing to the development of next-generation semiconductor technologies. Applicants should submit their updated resumes to the provided contact email for consideration.
Key Requirements
6 to 15 years of professional experience in Design Verification.
Advanced proficiency in SystemVerilog for hardware description and verification.
Extensive experience with Universal Verification Methodology (UVM).
Proven track record with Formal Verification techniques and tools.
Strong understanding of RTL design and the ASIC development lifecycle.
Knowledge of Data Fabric architectures and chip design principles.
Ability to work onsite at Austin, TX, Santa Clara, CA, or Boston, MA.
Experience in developing and maintaining complex testbenches.
Strong debugging skills at the register-transfer level.
Excellent analytical and problem-solving abilities within semiconductor environments.
0 Negotiable or Not Mentioned
USA
18 days ago
skalensemi.com
843 Views
SkalenSemi is currently seeking highly experienced Design Verification Engineers to join our growing team in the United States. We have 20 open positions available for professionals with 6 to 15 years of expertise in the semiconductor industry. Successful candidates will be working on-site at one of our key locations, which include Austin, Texas; Santa Clara, California; and Boston, Massachusetts. This is a significant opportunity to contribute to high-impact projects involving Data Fabric and complex chip architectures within a leading-edge environment.
The role focuses on developing robust verification environments and executing comprehensive test plans to ensure the integrity of advanced ASIC designs. Candidates will utilize SystemVerilog and UVM methodologies to perform rigorous testing and debugging of RTL code. Please be advised that these roles are strictly for experienced professionals and are not suitable for entry-level candidates or freshers. You will be expected to collaborate with cross-functional teams to drive verification excellence and meet project milestones in a fast-paced technical setting.
Key Requirements
Minimum 6 to 15 years of professional experience in Design Verification.
Deep expertise in SystemVerilog for testbench development.
Proven experience with UVM (Universal Verification Methodology) frameworks.
Strong knowledge of Formal Verification techniques and tools.
Extensive background in ASIC and RTL design verification processes.
Experience working with Data Fabric or high-speed interconnects.
Ability to develop comprehensive verification plans from architecture specifications.
Proficiency in debugging complex hardware designs using industry-standard simulators.
Familiarity with scripting languages such as Python or Perl for automation.
Excellent analytical and problem-solving skills in a VLSI environment.
0 Negotiable or Not Mentioned
USA, Burlington
22 days ago
ekcelsystems.com
1446 Views
Ekcel Systems is seeking a highly skilled Embedded Software Test Engineer with specialized experience in the Medical Device industry for a long-term role. The successful candidate will be responsible for the verification and validation of software in embedded and mobile systems, ensuring that all MedTech applications meet the highest safety and performance standards. This is a critical position requiring five days a week onsite presence in Burlington, MA, to collaborate closely with the development and regulatory teams.
Key responsibilities include creating and maintaining comprehensive test protocols that strictly comply with FDA, IEC 62304, and ISO 13485 regulations. You will develop detailed verification plans and ensure that all engineering processes align with international medical device standards. This role demands a deep understanding of software quality assurance within a regulated environment and the ability to verify complex embedded products to support clinical safety.
Key Requirements
Minimum of 5 years of experience in SW verification and validation within the Medical devices industry.
Must have extensive experience working specifically with Medical Device products.
Ability to develop and execute comprehensive verification plans for embedded and mobile systems.
Expertise in creating and maintaining test protocols in compliance with FDA standards.
Profound knowledge of IEC 62304 and ISO 13485 regulatory standards.
Proficiency in verification processes for embedded products in MedTech applications.
Strong understanding of international medical device regulations and safety requirements.
Willingness and ability to work onsite 5 days a week in Burlington, MA.
Proven track record in software quality assurance for regulated software systems.
Excellent analytical skills to ensure verification processes align with technical specifications.
0 Negotiable or Not Mentioned
USA, Burlington
27 days ago
ekcelsystems.com
1222 Views
Ekcel Systems is seeking an experienced Embedded Software Test Engineer to join our team in Burlington, MA. This is a long-term, onsite position requiring five days a week at our facility. The ideal candidate will have over five years of experience specifically within the medical device industry, focusing on software verification and validation. You will be responsible for developing and executing comprehensive verification plans for both embedded and mobile systems in MedTech applications, ensuring all products meet the highest standards of safety and reliability. The role involves creating and maintaining detailed test protocols that comply with stringent industry standards such as FDA regulations, IEC 62304, and ISO 13485. You will work closely with the development team to ensure that all verification processes align with medical device regulations. Proficiency in embedded product verification and a deep understanding of regulatory requirements are essential for success in this role. This is a great opportunity for a professional looking to contribute to life-saving technology in a stable, long-term environment while working on cutting-edge medical software systems.
Key Requirements
5+ years of experience in SW verification and validation of Medical devices industry.
Develop and execute comprehensive verification plans for embedded and mobile systems in MedTech applications.
Create and maintain test protocols in compliance with FDA, IEC 62304, ISO 13485, and other relevant standards.
Ensure verification processes align with medical device regulations.
Proficient in verification of embedded products.
Proficient with medical device standards and regulatory requirements.
Availability to work onsite 5 days a week in Burlington, MA.
Strong understanding of the software development life cycle in regulated environments.
Experience with automated testing tools for embedded systems.
Excellent technical writing and documentation skills for compliance reporting.
0 Negotiable or Not Mentioned
USA
25 days ago
skalensemi.com
1377 Views
SkalenSemi is currently seeking highly experienced professionals for the position of Lead Design Verification to support a large-sized IT and global design services Hyperscaler. This recruitment drive is for approximately 25 to 30 open positions, highlighting a significant expansion in their design verification capabilities. Work locations for these roles include Santa Clara, CA, and Texas, TX, offering opportunities for senior experts to work in major tech hubs. The role involves working at the forefront of semiconductor technology within a global design environment.
The successful candidates will lead complex verification projects, utilizing advanced methodologies to ensure the integrity of high-performance chips. Key responsibilities include defining verification architectures, developing comprehensive testbenches, and executing functional verification strategies for IP and SoC designs. Given the seniority of the role, candidates are expected to mentor junior engineers and drive technical excellence across the verification lifecycle. There is no salary mentioned in the original job post for this position.
Key Requirements
Minimum of 8 to 20 years of professional experience in Lead Design Verification.
Extensive expertise in SystemVerilog and Universal Verification Methodology (UVM).
Proven track record in Functional Verification, RTL Verification, and SoC Verification.
Deep knowledge of IP Verification and Subsystem Verification techniques.
Experience in developing robust Verification Architectures and Testbenches.
Proficiency in Coverage-Driven Verification and Constrained Random Verification.
Advanced skills in Assertion-Based Verification (SVA) and Scoreboarding.
Demonstrated ability in Debugging and Waveform Debug using industry-standard tools.
Familiarity with Simulation and Emulation-Ready RTL processes.
Experience in Pre-Silicon Validation within a high-performance computing environment.
0 Negotiable or Not Mentioned
USA, Sunnyvale
31 days ago
skalensemi.com
1592 Views
Skalen Semi is hiring Senior Emulation Engineers for our location in Sunnyvale, California. This position supports large IT and design services hyperscalers in the United States, focusing on advanced hardware emulation platforms including Zebu, Palladium, and Veloce. The role is critical for Pre-Silicon Validation and SoC Emulation within high-stakes semiconductor projects involving chip design and hardware acceleration. Candidates should possess 6 to 12 years of relevant experience in the VLSI industry. Key responsibilities include managing chip verification, functional verification, and RTL verification processes. You will work on cutting-edge hardware acceleration and emulation debug tasks, utilizing SystemVerilog and UVM methodologies. This is a technical leadership opportunity for engineers looking to advance their careers with a leading semiconductor services provider in Sunnyvale.
Key Requirements
6 to 12 years of professional experience in hardware emulation.
In-depth expertise with emulation platforms such as Zebu, Palladium, or Veloce.
Strong background in Pre-Silicon Validation and SoC Emulation techniques.
Proficiency in RTL Verification and Functional Verification processes.
Experience with FPGA Prototyping and complex system verification.
Hands-on knowledge of hardware acceleration and emulation debug tools.
Familiarity with UVM (Universal Verification Methodology) and SystemVerilog.
Previous experience working with SoC, ASIC, and Chip Design lifecycles.
Proven ability to provide technical leadership and mentor junior engineers.
Excellent analytical skills for waveform debug and testbench acceleration.
0 Negotiable or Not Mentioned
USA, Livermore
28 days ago
katalysthls.com
1304 Views
Katalyst Pro is seeking a dedicated Validation Engineer for a confidential client in Livermore, CA. This onsite role is a W2 contract position lasting between 6 to 12 months or more, specifically targeting candidates with a strong background in automotive or heavy-duty vehicle validation. The selected individual will be responsible for conducting comprehensive hands-on testing and validation protocols to ensure vehicle systems meet rigorous performance and safety standards. You will work within a dynamic environment, focusing on troubleshooting, prototyping, and verifying designs through established DV/PV cycles.
The ideal candidate will possess a Bachelor's degree in Engineering and at least two years of relevant experience. Technical proficiency in tools such as Vector, CAN tools, and MATLAB is essential for analyzing vehicle data and system communication. You will collaborate with cross-functional engineering teams to drive product quality and compliance with industry standards like FMVSS, SAE, and NFPA. Due to the nature of the project, eligibility is limited to US Citizens and Green Card holders only. Experience with pneumatic braking systems and previous exposure to major automotive OEMs will be highly regarded.
Key Requirements
Bachelor’s degree in Engineering (Mechanical, Mechatronics, or related field).
Minimum of 2 years of experience in Automotive or Heavy Vehicle Validation.
Demonstrated experience with DV/PV (Design Verification / Product Validation) processes.
Proficiency in hands-on vehicle testing, troubleshooting, and prototyping.
Advanced technical skills with Vector and CAN communication tools.
Expertise in using MATLAB for engineering analysis and data processing.
Strong cross-functional collaboration and communication skills.
Knowledge of FMVSS, SAE, and NFPA industry standards.
Familiarity with pneumatic braking systems and vehicle architecture.
Must be a US Citizen or Green Card holder due to contract requirements.