0 Negotiable or Not Mentioned
India, PAN India
9 days ago
burgeonits.com
220 Views
Burgeon IT Services is seeking a highly skilled SAP ABAP Engineer to join our dynamic team on a contract-to-hire basis. The successful candidate will be responsible for designing, developing, enhancing, and supporting ABAP-based solutions within the SAP S/4HANA landscape. This role involves a mix of technical prowess and collaborative problem-solving, ensuring that business processes are supported by robust, scalable, and maintainable technical implementations across various SAP modules. You will work in a hybrid environment, allowing for a flexible yet productive workflow while contributing to high-impact projects within the SAP ecosystem.
The key responsibilities include developing SAP FIORI or ABAP-RAP solutions for reports and transactional applications, as well as managing the full lifecycle of WRICEF components. You will collaborate with cross-functional teams involving Basis, Integration, and functional streams to troubleshoot defects and optimize performance. Technical documentation and unit testing are essential parts of the role to ensure quality delivery. We are looking for immediate joiners or individuals with a notice period of up to 30 days who are ready to dive into the technical intricacies of SAP HANA optimization and third-party integrations. This position is open for PAN India candidates on a hybrid work model.
Key Requirements
Bachelor’s degree in Computer Science, Engineering, IT, or a related field.
A minimum of 6-8 years of professional experience in SAP ABAP and SAP FIORI development.
Deep expertise in the ABAP RESTful ABAP Programming Model (RAP) and CDS Views.
Proficiency in designing, developing, and deploying Adobe Forms and OData services.
Extensive hands-on experience with SAP Workflows and transactional FIORI applications.
Strong skills in debugging, performance tuning, and SAP HANA database optimization.
Proven ability to manage WRICEF components (Workflows, Reports, Interfaces, Conversions, Enhancements, and Forms).
Solid understanding of SAP AMDP (ABAP Managed Database Procedures) and Object-Oriented ABAP (OO-ABAP).
Experience supporting integrations between SAP CI (Cloud Integration) and various third-party systems.
Ability to translate complex functional specifications into detailed technical designs.
Excellent communication skills for collaborating with cross-functional teams including Basis and Integration streams.
Commitment to preparing comprehensive technical documentation and unit test plans.
0 Negotiable or Not Mentioned
India, Bengaluru
24 days ago
prachodayathglobal.com
1463 Views
Prachodayath Global is currently looking for an experienced Memory Compiler Design, Characterization & Validation Engineer to join our technical team. This role is pivotal for engineers with over 4 years of experience who possess a strong expertise in SRAM, RF, and ROM memories. The successful candidate will be responsible for design, characterization, validation, and collateral generation across advanced technology nodes, ensuring high performance and reliability of memory components.
The position involves performing critical tasks such as SPICE simulations, FSDB debugging, and timing/power characterization. You will execute Vmin analysis, aging simulations, and validation using tools like Nanotime STA and ESPCV. Furthermore, you will analyze trends within Liberty files and perform noise characterization. Scripting in Shell, Python, TCL, or Perl will be required to automate flows and analyze data effectively, contributing to the overall optimization of PPA (Power, Performance, and Area) within memory architectures.
Key Requirements
Minimum 4 years of experience in memory design, characterization and validation.
Expertise in SRAM/RF/ROM memories design and validation processes.
Proficiency in SPICE simulations and FSDB debugging techniques.
Hands-on experience with timing and power characterization.
Skilled in performing Vmin analysis and aging simulations.
Experience with ERC, ESPCV, and Nanotime STA validation.
Solid understanding of PVT scaling and memory margining techniques.
Ability to analyze trends and compare Liberty files for QA checks.
Proficiency in EDA tools such as HSPICE, Spectre, Liberate, and SiliconSmart.
Basic scripting skills in Shell, Python, TCL, or Perl for automation purposes.
Understanding of compiler architecture and integration flows.
Knowledge of release processes and collateral validation.