MEMORY COMPILER DESIGN, CHARACTERIZATION & VALIDATION ENGINEER @ PRACHODAYATH GLOBAL
Prachodayath Global is currently looking for an experienced Memory Compiler Design, Characterization & Validation Engineer to join our technical team. This role is pivotal for engineers with over 4 years of experience who possess a strong expertise in SRAM, RF, and ROM memories. The successful candidate will be responsible for design, characterization, validation, and collateral generation across advanced technology nodes, ensuring high performance and reliability of memory components.
The position involves performing critical tasks such as SPICE simulations, FSDB debugging, and timing/power characterization. You will execute Vmin analysis, aging simulations, and validation using tools like Nanotime STA and ESPCV. Furthermore, you will analyze trends within Liberty files and perform noise characterization. Scripting in Shell, Python, TCL, or Perl will be required to automate flows and analyze data effectively, contributing to the overall optimization of PPA (Power, Performance, and Area) within memory architectures.
The position involves performing critical tasks such as SPICE simulations, FSDB debugging, and timing/power characterization. You will execute Vmin analysis, aging simulations, and validation using tools like Nanotime STA and ESPCV. Furthermore, you will analyze trends within Liberty files and perform noise characterization. Scripting in Shell, Python, TCL, or Perl will be required to automate flows and analyze data effectively, contributing to the overall optimization of PPA (Power, Performance, and Area) within memory architectures.
Key Requirements
Minimum 4 years of experience in memory design, characterization and validation.
Expertise in SRAM/RF/ROM memories design and validation processes.
Proficiency in SPICE simulations and FSDB debugging techniques.
Hands-on experience with timing and power characterization.
Skilled in performing Vmin analysis and aging simulations.
Experience with ERC, ESPCV, and Nanotime STA validation.
Solid understanding of PVT scaling and memory margining techniques.
Ability to analyze trends and compare Liberty files for QA checks.
Proficiency in EDA tools such as HSPICE, Spectre, Liberate, and SiliconSmart.
Basic scripting skills in Shell, Python, TCL, or Perl for automation purposes.
Understanding of compiler architecture and integration flows.
Knowledge of release processes and collateral validation.